A Coprocessor Architecture for 80/112-bit Security Related Applications

We have proposed a flexible coprocessor key-authentication architecture for 80/112-bit security-related applications over field by employing Elliptic-curve Diffie Hellman (ECDH) protocol. Towards flexibility, serial input/output interface is used to load/produce secret, public, and shared keys sequentially. Moreover, reduce the hardware resources achieve reasonable time cryptographic computations, we finite digit-serial multiplier using combined shift accumulate techniques. Furthermore, two finite-state-machine controllers are perform efficient control functionalities. The programmed Verilog then implemented on Xilinx Virtex-7 FPGA (field-programmable-gate-array) device. For , use 1351 1789 slices, achieved clock frequency 250 235 MHz, one public key computation 40.50 79.20 μs generation 81.00 158.40 μs. Similarly, consumed power 0.91 1.37 mW, respectively. outperforms state-of-the-art ECDH designs in terms of resources.